![]() ![]() Then repeat again with the output of that and that > N/4, etc. You can optimise that a bit by having a 2 way mux that has val and val > N/2. The simplest version is just an N way mux with each possible option passed in. If you want to do a variable shift you need a barrel shifter. If you want to do a 2 bit shift, you just repeat that operation twice, etc. You've also got the arithmetic right shift where you copy the old MSb into the new one, in order to preserve the sign. bit 0 is dropped.Īssign my_shifted_8bit_signal = Īs you said the only difference for the ROR operation is that instead of using a constant '0' as the MSb you bring in the carry bit. If you have an 8 bit vector, a 1 bit logical shift right is add a constant '0' as the new MSb, bit 7 becomes bit 6, bit 6 becomes bit 5. In general terms a constant bit shift is just changing your wire order. Presumably if you look through the alu module at where "right" is used you'll find the actual shift. Line 571: that's passed in to the "right" input of the ALU module. Line 616: That's connected to the alu_shift_right signal through a mux. Line 1124 decodes the opcode for LSR and ROR and sets the shit_right flag. a logical (arithmetic) shift right (cast a to unsigned, shift by 1, cast result back to std_logic_vectorĪ_shifted <= std_logic_vector(shift_right(unsigned(a), 1)) Ī_rotated <= std_logic_vector(rotate_right(unsigned(a), 1)) Note that the std_logic_vectors must be cast to signed or unsigned types so that for the arithmetic shifts the sign-bit is extended if required. Or use the shift_right and rotate right functions from ieee.numeric_std. signal a_rotated : std_logic_vector(7 downto 0)Ī_rotated <= a(a'right) & a(a'left downto 1) signal a_shifted : std_logic_vector(7 downto 0) signal a : std_logic_vector(7 downto 0) Here is a handy reference I found (see the first page).In VHDL there are a couple of ways of doing it: Rotating does just that, the MSB ends up in the LSB and everything shifts left (rol) or the other way around for ror. ![]() Rotate functions: rol (rotate left), ror (rotate right). Note that for all of these operations you specify what you want to shift (tmp), and how many times you want to perform the shift ( n bits) Arithmetric shifts (sra/sla) insert the left most or right most bit, but work in the same way as logical shift. The functions are: sll (shift left logical), srl (shift right logical). Shift functions (logical, arithmetic): These are generic functions that allow you to shift or rotate a vector in many ways. For example: tmp <= tmp(14 downto 0) & '0' You specify what part of the original signal that you want to "keep" and then concatenate on data to one end or the other. Concatenation, and shift/rotate functions.Ĭoncatenation is the "manual" way of doing things. There are two ways that you can achieve this. However, the answer to the original question is still sig <= tmp sll number_of_bits The shift and rotate operators sll, ror etc are for vectors of boolean, bit or std_ulogic, and can have interestingly unexpected behaviour in that the arithmetic shifts duplicate the end-bit even when shifting left. Of course the correct way to shift signed and unsigned types is with the shift_left and shift_right functions defined in ieee.numeric_std. I have no idea what I was writing above (thanks to Val for pointing that out!) You pass a parameter to the operator to define the number of bits to shift: A <= B srl 2 - logical shift right 2 bits Then the operators are sla/ sra for arithmetic shifts (ie fill with sign bit on right shifts and lsb on left shifts) and sll/ srl for logical shifts (ie fill with '0's). Use the ieee.numeric_std library, and the appropriate vector type for the numbers you are working on ( unsigned or signed). ![]()
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